NOTE: Don't think that these bits only will be repeated in II mid. Prepare concepts well then go through the bits.
STLD
SECOND MID BITS
UNIT-5(Programmable Logic devices)
1. In programmable logic array [ c ]
(a) AND –array is fixed &OR- array is programmable (b) AND-array is programmable & OR-array is fixed (c) both AND &OR array are programmable (d) both AND &OR array are fixed
2. Total no.of programmable fuses in ‘n’ input ‘m’ output PROM is [ c ]
(a) n (b) nXm (c) 2nXm (d) 2mXn
3. Programming a PLD device means [ b ]
(a) writing software program (b) blowing electronic fuses
(c) writing assembly language program (d) writing C program
4. When power supply of ROM is switched off, its contents [ c]
(a) becomes zero (b) becomes all ones (c) remains same (d) are unpredictable
5. The Programmable Array Logic consists of [ d ]
a) fixed OR and AND gates b) Programmable OR , fixed AND gates
c) Programmable OR and AND gates d) Programmable AND , fixed OR gates
6. Four RAM chips of 16×4 size have their busses connected together. This system will be of size
[ c]
a) 16×4 b) 256×1 c) 16×16 d) 32×8
7. The parameters of a threshold element are [ a]
a) weights assigned to input variable s and T b) output variables
c) weights assigned to input variables d) value of T
8. The address bus with a ROM of size 1024*8 bits is [ b]
a)8 bits b) 10 bits c) 12 bits d) 16 bits
9. The ROM programmed during manufacturing process itself is called [ a ]
a)MROM (b) PROM (c) EPROM (d) EEPROM
10. A memory in which the contents get erased when power failure occurs is [ d ]
a)EAROM (b) PROM (c) ROM (d) RAM
11. A single literal term in SOP expression [ b ]
a)Requires an inverter for PLA implementation
b)Requires an AND gate for PLA implementation
c)Doesn’t requires an AND gate for PLA implementation
d) Doesn’t requires an inverter for PLA implementation
SECTION-II: FILL IN THE BLANKS
1. In a positive unite function all the variables are only in Un complemented form.
2. Non threshold functions cannot be realized using a single threshold gate.
3. A PLA consists of AND, OR and invert / non invert matrix
4. A ROM has 32K×8 organization. Its capacity in bits is 256 KB
5. The number of outputs of a threshold element is 1
6. A combinational PLD with programmable AND array and programmable OR array is called as PLA
7. The full form of PROM is programmable read only memory.
